Vidwan-ID : 588307



  • Prof Chandra Sekhar Paidimarry

  • Principal
  • Osmania University
Publications 2008 - 2024

Publications

  • 55
    Journal Articles
  • 4
    Book Chapter
  • 5
    Book
  • 46
    Conference
    Proceedings
  • 3
    Book-chapter
  • 1
    Other
  • 8
    Projects
  • 5
  • 30

Citations / H-Index

148 Citations
5 h-index
77 Citations

Google Scholar

Co-author Network


Expertise

Telecommunications

Prof. Chandra Sekhar Paidimarry received Post Doctoral Fellowship (2009, Shizuoka University, Japan), PhD (2009, OU), M.Tech (1999, JNTUH) and BE (1991, Nagpur University). Prof. Chandra Sekhar has been taken over charge as I/c Principal, University College of Engineering (A), Osmania University on 16th February, 2024 and is serving as Vice-Principal, University College of Engineering (UCE), OU from 2021. He served as Director of Evaluation, Examination Cell, UCE (2019-21), Head, Dept of ECE, UC

Personal Information

Prof Chandra Sekhar Paidimarry

Male
Dept of ECE University College of Engineering Osmania University, Hyderabad
Hyderabad, Telangana, India - 500013


Experience

  • Principal

    Electronics & Communication Engineering

    Osmania University

  • Professor

    Electronics & Communication Engineering

    Osmania University


Qualification

  • Post Doc

    Shizuoka University, Japan

  • PhD

    Osmania University

  • M. Tech

    JNTUH College of Engineering Hyderabad

  • B. E

    Nagpur University


Honours and Awards

2024

Telangana State Best Teacher Award

Government of Telangana

2024

Excellency Award

Athidi National Telugu Monthly

2023

Prof K Srinivasan Memorial Award

Institute of Electronics and Telecommunications Engineers

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2024

Telangana State Best Teacher Award

Government of Telangana

2024

Excellency Award

Athidi National Telugu Monthly

2023

Prof K Srinivasan Memorial Award

Institute of Electronics and Telecommunications Engineers

2022

Vice Chancellor Award

Osmania University

2022

Teacher Award

Institute of Engineers India, Hyderabad Chapter

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Doctoral Theses Guided

2023

An Efficient Memory Controller for Multi-Core Processors in System-on-Chip

Ahmed Noami, Osmania University, Hyderabad

2023

FPGA Based Digital Beam forming Techniques

Mr. T. Abhishek, Osmania University, Hyderabad

2023

A Novel Pulmonary Nodule Detection and Classification Framework using Statistical and Machine Learning Methods

Mr. K. Hareesh, Osmania University, Hyderabad

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2023

An Efficient Memory Controller for Multi-Core Processors in System-on-Chip

Ahmed Noami, Osmania University, Hyderabad

2023

FPGA Based Digital Beam forming Techniques

Mr. T. Abhishek, Osmania University, Hyderabad

2023

A Novel Pulmonary Nodule Detection and Classification Framework using Statistical and Machine Learning Methods

Mr. K. Hareesh, Osmania University, Hyderabad

2022

IP core development of GNSS Software Defined Radio: Base-band Algorithms using reconfigurable architectures in FPGA

Mr. B. Pradeep Kumar, Osmania University, Hyderabad

2022

Investigation of PAPR Mitigation in OFDM System using Hybrid Methods for Wireless Communication

Ms Sravanthi Thota, Osmania University, Hyderabad

2022

Detection and Reduction of Cross-Talk Noise in VLSI Interconnects

Ms R Sridevi, Jawaharlal Nehru Technological University, Hyderabad

2021

Analysis & Optimization of On-Chip Interconnect Performance Metrics for Driver-Interconnect-Load Systems

Mr. S. Rajender, Jawaharlal Nehru Technological University, Hyderabad

2021

Investigative Studies on Providing Solutions for the Asymmetric Characteristics of Mobile Communication Systems based on EM Radiations

Mr. V.RK Sharma, Jawaharlal Nehru Technological University, Kakinada

2020

Efficient Hybrid Conformal FDTD Techniques to the Analysis of Circular Patch Antennas

Mr. N. Kuru Murthy, Osmania University, Hyderabad

2020

Universal Verification Methodology for Communication IP Cores with Reusable Feature

Ms. Ch. Sridevi, Jawaharlal Nehru Technological University, Hyderabad

2020

Adaptive Forward and Reverse Body Biasing Techniques for Sub-threshold Circuits

Ms. P Kalyani, Jawaharlal Nehru Technological University, Hyderabad

2020

Automated Registration of Multi-angle SAR Images Using Adaptive View Synthesis Framework

Ms. D. Sireesha, Koneru Lakshmaiah University, Vijayawada

2019

Modelling of On-chip VLSI Interconnects for Signal Integrity Analysis

Mr. Hari Prasad Naik, Osmania University, Hyderabad

2019

Design and Analysis of CMOS Low Noise Amplifier Topologies in Receiver Front-end for 4GWIMAX Systems

Mr. M. Ramana Reddy, Jawaharlal Nehru Technological University, Kakinada

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Membership In Professional Bodies

2025

Instrumentation Society of India

Life Member

2025

Biomedical Engineering Society of India

Life Member

2022

Institute of Engineers India

Life Member

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2025

Instrumentation Society of India

Life Member

2025

Biomedical Engineering Society of India

Life Member

2022

Institute of Engineers India

Life Member

2022

Institute of electronics and telecommunication engineers

Life Member

2015

Intstitute of electrical and electronics engineers

Senior Member

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Membership In Committees

2024

TS ECET

Convener

2022

Gurugram University

Executive Council member

2022

UGC

Expert Committee Member

2024

TS ECET

Convener

2022

Gurugram University

Executive Council member

2022

UGC

Expert Committee Member

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Research Projects

Smart City Services Driven by Internet of Things, Machine Learning and Artificial Intelligence Algorithms

Funding Agency : RUSA 2.0 Govt. of India

Local Language Voice based Healthcare and Emergency Assistance Device for Elderly

Funding Agency : BIRAC SPARSH

Real Time Reconfigurable Anti-Jamming Capable GNSS Receiver in FPGA

Funding Agency : CSIR

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Smart City Services Driven by Internet of Things, Machine Learning and Artificial Intelligence Algorithms

Funding Agency : RUSA 2.0 Govt. of India

Local Language Voice based Healthcare and Emergency Assistance Device for Elderly

Funding Agency : BIRAC SPARSH

Real Time Reconfigurable Anti-Jamming Capable GNSS Receiver in FPGA

Funding Agency : CSIR

Design and Development of IP core for for SDR/GNSS Receiver Using VHDL/ Verilog

Funding Agency : RCI

Design and Development of FPGA based dual threshold WAM technique for Multilateration Systems

Funding Agency : CARS

GNSS Software Receivers: Baseband algorithms using FPGA

Funding Agency : UGC

The Design, Fabrication and Development of Silicon Proven IP Core for High Resolution ADPLL

Funding Agency : MeiTy, Govt. of India

“Development of GNSS Waveform Generators and Receiver Algorithms

Funding Agency : Mathworks Pvt Ltd

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Patents







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